Category: General Electronics
Good news for anyone on our Professional or Premium plans: unused InstaPart credits now rollover on quarterly and annual subscriptions!
InstaPart is our popular on-demand model request service that allows PCB designers & teams to get any symbol & footprint within 24 hours. InstaPart, along with several other features, is available with our paid plans, or can be purchased standalone.
Here’s how the new rollovers work: for those on the quarterly plan, you’ll now be able to request up to 15 parts with your plan within a 90 day period. For those on the Annual plan, you’ll be able to request up to 60 parts in a 365 day period.
If you need extra parts on top of that, or you request very sporadically and don’t want to sign up for a plan, there are InstaPart credits that never expire. Pricing for InstaPart credits is available here.
Again, all parts created with InstaPart are created & verified to IPC-7351 standards. After we create them, they’re made available to the entire hardware community to download for free on SnapEDA!
You can now convert your Eagle libraries to KiCad, Altium, OrCad (and other formats) on SnapEDA.
When Autodesk moved Eagle to a subscription model last month, many of our users began asking how they could translate their libraries.
We are big fans of Eagle and the new changes they’re making, and are confident that the subscription model will bring much-needed features to the software. But we also understand that it is (for many) a showstopper. Hopefully this free tool is helpful to those for whom this is the case.
Try the tool for yourself here, or watch the video below to see it in action!
When you think about electronics design, you would probably guess that the vast majority is taking place in the U.S., India, China, Germany or Japan. But our data tells a different story.
We discovered that design & innovation is happening everywhere, and that the electronics design industry is vast, global, and widely distributed.
Let’s take a look at where PCBs are being designed*, and what it means for our industry.
Since launching SnapEDA, designers have visited our site in 191 countries, with the United States being the most popular, accounting for 25% of visitors. Unsurprisingly, Canada**, India, Germany, United Kingdom, and Russia follow closely behind.***
But here’s where it gets interesting. These countries, in aggregate, account for just 47% of our visitors. This means that over half our visitors comes from the other 185 countries, and not any one of these countries account for more than 3% of visitors.
I am often asked how to merge individual Eagle library files downloaded from SnapEDA into existing libraries, or into one big library. Although this is available as a feature included in SnapEDA’s Premium version (ie. the ability to batch together parts and bulk download them into a single Eagle library file), there are also several other ways to do this manually. Here’s one of the easiest ways I’ve found:
- After downloading an Eagle .lbr file from SnapEDA, move that file into the lbr folder within Eagle’s application directory
- If you have an existing library you’d like to add that .lbr file to, open that library by going to File > Open. Otherwise, create a new library file and Save the library with the desired name.
- Open the Control Panel by going to Window > Control Panel
- Expand the Libraries item
- Find the .lbr file downloaded from SnapEDA, then expand it. At this point you should see device, package, and symbol items
- Right-click on the device, and select Copy to Library (note: if this option is greyed out, you need to double-check to make sure the library you are trying to copy to is open)
- Repeat this process for every .lbr file you would like to add to the library
With the Premium version of SnapEDA, parts are consolidated into a single library upon downloading your Private Parts Library. For more information, or to join our Beta, email email@example.com.
We are excited to announce that Seeed Studio’s Open Parts Library is now available on SnapEDA! For those unfamiliar with Seeed, they’re an open hardware facilitator based in China that inspires startups and makers with electronics resources, and provides in-house engineering, supply chain management, and manufacturing services.
What exactly is the Open Parts Library? When designing a circuit board and selecting components, it can be hard to know where to start. Whether its selecting a bluetooth module or a 10k resistor, the components you choose will affect your bill of materials (BOM) cost, lead times, and overall peace of mind (as anyone who has ordered — and paid shipping charges — from multiple distributors knows too well).
Seeed’s OPL is a collection of commonly used components geared towards makers that most (if not all) distributors generally have on hand, are cost effective, and are design for manufacturing (DFM) friendly. In terms of manufacturing, the components are large enough to be hand-soldered when prototyping early on in the design process, and when ready for volume manufacturing, can be easily assembled without requiring precision equipment.
Seeed’s Open Parts Library Component Sets
Seeed, which is based in Shenzhen, China, selected components from trusted manufacturers that leveraged the strength of their local supply chain. However, because most of their customers are based in the U.S., the parts are also widely distributed in North America. Seeed also does PCB manufacturing & assembly and ensures the components in the OPL are always stocked to shorten lead times. This has also given them the ability to test the reliability of the parts in the OPL thousands of times.
The components were selected based on Seeed’s experience reviewing customers’ designs, where they started to see patterns and began to identify a standard set of components being used. Although the OPL is more suited to makers, Seeed hopes to release more versions of the library, such as one for startups or targeted towards particular applications.
By making the library available on SnapEDA (created by Seeed’s engineers), the libraries are now accessible in a wider range of design formats.
For those who are unfamiliar with SnapEDA, it is a platform for electronic design data, including PCB footprints and schematic symbols. Rather than spending hours creating design data from scratch, engineers can simply search for a component on SnapEDA and download design data instantly, saving them hours of time in the process. Design data on SnapEDA is free for download and exports to all major design tools, including Eagle, Altium, KiCAD, Cadence OrCAD/Allegro, Mentor PADS, & Pulsonix.
Over a thousand components are included in Seeed’s library, including microcontrollers like the Cortex M4 and the Atmel328P, ICs, resistors, capacitors, inductors, diodes, transistors, crystal oscillators, connectors, and fuses.
Seeed also constantly updates the OPL, so if you have ideas on new parts that should be added to the library, be sure to let them know.
I am often asked how SnapEDA vets the quality of the CAD files it provides. Since launching, we’ve had a rating & commenting system to provide a feedback loop for engineers to report inaccuracies with CAD files, or to vouch for their quality. Although this system is leaps and bounds better than any other alternative means of sourcing CAD files, we’ve long wanted to improve upon this in more programmatic, objective ways.
That’s why this summer we quietly rolled out a Beta version of the SnapEDA Checker. The goal of the checker is to provide engineers with transparency into the quality of CAD data by programmatically mining through CAD files and distilling to engineers the results of a series of quality checks.
Using algorithms, the Checker uncovers common pitfalls that could cause manufacturing problems, such as placement of silkscreen over bare copper, or poorly defined centroids that often cause issues with pick-and-place machines. We then distill the findings in a “report card” so that engineers know ahead of time the complexities of the file they are downloading and can decide whether the file meets their requirements and standards, or whether the file needs modifications.
To see the SnapEDA Checker in action, just go to any part page, and click on Validations, as shown below.
This Checker is a flexible framework that we plan to expand with more checks. What are some checks you’d like to see? Let us know in the comments!
If you’d like to provide feedback on a part you download from SnapEDA, you can easily rate it on each part page as shown below. But if you download many parts, it could be time-consuming to visit each page to rate it after downloading. We’ve now made it much easier to provide your feedback on the parts you download from SnapEDA, by providing a dashboard-view of your most recent downloads so that you can quickly share your insights into a schematic symbol, PCB footprint, or component with the community.
To find this dashboard, simply go to your notifications and select Recent Downloads.
You’ll now be able to see one centralized place where you can find all of your parts in one place.
Simply click on the checkmark to approve a part, or the x to provide your feedback. Happy rating — and designing!
One of the most common questions designers have while creating printed circuit board (PCB) footprints is: what are the correct dimensions for the pads? Increasingly, designers are adopting the IPC-7351 standard, which provides guidelines for calculating pad dimensions. In general, following standards is a good idea since it helps maintain consistency, accuracy, and reliability — all important things to consider when trying to de-risk your designs, reduce prototype iterations, and get things right the first time.
In this article we’ll be exploring how the IPC standard is applied to small outline integrated circuits (SOICs), a popular package type for electronic components. In further blog posts we’ll delve into some of the other types of ICs, including leadless and through-hole packages.
When creating a footprint for a SOIC, it’s important to recognize that they can differ based on the package’s body size, pad span, pitch of leads, and so on. This is why it’s essential to make sure you have an SOIC footprint that matches the exact dimensions and tolerances of the manufacturer’s package for the component you are using. Additionally, there are also other flavours of SOICs, including J-leaded ones.
The IPC-7351 standard requires three important dimensions when calculating the footprint (or land pattern) dimensions for an SOIC: the maximum dimension from pad to pad (L), the inner dimension (s), and the width of the pad (w).
Figure 1: A general SOIC Footprint
The IPC-7351 Equations for SOICs
In order to calculate the pad dimensions, the IPC-7351 specifies three main equations, following the MMC (maximum material condition) environment:
Zmax = Lmin + 2Jt + sqrt(Cl²+F²+P²)
Gmin = Smax – 2Jh – sqrt(Cs²+F²+P²)
Xmax = Wmin + 2Js + sqrt(Cw²+F²+P²)
* The value of L can be derived from the package dimensions. It is the value from lead termination end to lead termination end. W can also be derived from the package dimensions; it is the width of the lead or termination. S is the distance between component terminations, which can be calculated as follows:
Smax = Lmax – 2(Tmin), where T is the lead length as measured across the footprint (also provided from the package dimensions)
* Jt, Jh and Js are solder fillets to the toe, heel and sides
* Cl, Cs and Cw are the component tolerances. The component tolerances are the variations given in the datasheet. For example: L is 0.5 +- 0.2 – thus 0.5 is the nominal dimension and 0.2 is the tolerance Cl.
* F and P are the fabrication and placement tolerance. IPC uses a standard value of 0.1mm for each.
The table below shows the values for the solder fillet (Jt, Jh and Js) according to each environment (maximum, median or least).
Table 1: Values for solder fillet (Jt, Jh, and Js)
Now that we have all the equations, it is easy to check if a footprint downloaded from SnapEDA follows the IPC standard.
In Figure 3, you’ll see an SOIC footprint downloaded from SnapEDA. In this figure, the red rectangles are the pads, while the white layer on the top of the pad is the documentation layer, whose dimensions are the same as the component outline, as specified by the IPC. Also, you’ll notice the silkscreen layer, showing the pin 1 indicator as required.
Figure 4: A SOIC PCB Footprint Downloaded from SnapEDA
To summarize, in this post we learned about the IPC industry standard and how they are applied for SOIC packages. The next posts will bring more information about SMD rules for calculating the pad dimensions for other types of components, including leadless packages, and through-hole packages like TO (Transistor Outline) packages.